exo2: implement warmboot firmware

libraries/libexosphere/include/exosphere/tegra/tegra_timer.hpp

@@ -16,7 +16,7 @@
 #pragma once
 #include <vapours.hpp>
 
-
+#define TIMERUS_USEC_CFG              (0x014)
 #define TIMER_SHARED_TIMER_SECURE_CFG (0x1A4)
 
 #define TIMER_REG_BITS_MASK(NAME)                                      REG_NAMED_BITS_MASK    (TIMER, NAME)
@@ -30,6 +30,9 @@
 #define DEFINE_TIMER_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)                                                               REG_DEFINE_NAMED_THREE_BIT_ENUM(TIMER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
 #define DEFINE_TIMER_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (TIMER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
 
+DEFINE_TIMER_REG(USEC_CFG_USEC_DIVISOR,  0, 8);
+DEFINE_TIMER_REG(USEC_CFG_USEC_DIVIDEND, 8, 8);
+
 DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_TMR5, 5, DISABLE, ENABLE);
 DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_TMR6, 6, DISABLE, ENABLE);
 DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_TMR7, 7, DISABLE, ENABLE);