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sept: commit working primary.

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This commit is contained in:
Michael Scire
2019-02-20 04:52:11 -08:00
parent 85669ef491
commit 26f45fab19
34 changed files with 5744 additions and 10 deletions
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57
fusee/fusee-secondary/src/utils.c
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@@ -32,6 +32,7 @@
#define u8 uint8_t
#define u32 uint32_t
#include "fusee_primary_bin.h"
#include "sept_primary_bin.h"
#include "rebootstub_bin.h"
#undef u8
#undef u32
@@ -65,7 +66,7 @@ __attribute__((noreturn)) void pmc_reboot(uint32_t scratch0) {
}
}
__attribute__((noreturn)) void reboot_to_fusee_primary(void) {
__attribute__((noreturn)) static void reboot_to_payload(void) {
/* Patch SDRAM init to perform an SVC immediately after second write */
APBDEV_PMC_SCRATCH45_0 = 0x2E38DFFF;
APBDEV_PMC_SCRATCH46_0 = 0x6001DC28;
@@ -73,11 +74,6 @@ __attribute__((noreturn)) void reboot_to_fusee_primary(void) {
APBDEV_PMC_SCRATCH33_0 = 0x4003F000;
APBDEV_PMC_SCRATCH40_0 = 0x6000F208;
/* Copy fusee-primary into IRAM low. */
for (size_t i = 0; i < fusee_primary_bin_size; i += sizeof(uint32_t)) {
write32le((void *)0x40010000, i, read32le(fusee_primary_bin, i));
}
/* Copy reboot stub into IRAM high. */
for (size_t i = 0; i < rebootstub_bin_size; i += sizeof(uint32_t)) {
write32le((void *)0x4003F000, i, read32le(rebootstub_bin, i));
@@ -85,6 +81,55 @@ __attribute__((noreturn)) void reboot_to_fusee_primary(void) {
/* Trigger warm reboot. */
pmc_reboot(1 << 0);
while (true) { }
}
__attribute__((noreturn)) void reboot_to_fusee_primary(void) {
/* Copy fusee-primary into IRAM low. */
for (size_t i = 0; i < fusee_primary_bin_size; i += sizeof(uint32_t)) {
write32le((void *)0x40010000, i, read32le(fusee_primary_bin, i));
}
reboot_to_payload();
}
__attribute__((noreturn)) void reboot_to_sept(const void *tsec_fw, size_t tsec_fw_length, const void *stage2, size_t stage2_size) {
/* Copy tsec firmware. */
for (size_t i = 0; i < tsec_fw_length; i += sizeof(uint32_t)) {
write32le((void *)0x40010F00, i, read32le(tsec_fw, i));
}
MAKE_REG32(0x40010EFC) = tsec_fw_length;
/* Copy stage 2. */
for (size_t i = 0; i < stage2_size; i += sizeof(uint32_t)) {
write32le((void *)0x40016FE0, i, read32le(stage2, i));
}
/* Copy sept into IRAM low. */
for (size_t i = 0; i < sept_primary_bin_size; i += sizeof(uint32_t)) {
write32le((void *)0x4003F000, i, read32le(sept_primary_bin, i));
}
/* Patch SDRAM init to perform an SVC immediately after second write */
APBDEV_PMC_SCRATCH45_0 = 0x2E38DFFF;
APBDEV_PMC_SCRATCH46_0 = 0x6001DC28;
/* Set SVC handler to jump to reboot stub in IRAM. */
APBDEV_PMC_SCRATCH33_0 = 0x4003F000;
APBDEV_PMC_SCRATCH40_0 = 0x6000F208;
/* Trigger warm reboot. */
pmc_reboot(1 << 0);
while (true) { }
}
__attribute__((noreturn)) void reboot_to_iram_payload(void *payload, size_t payload_size) {
/* Copy sept into IRAM low. */
for (size_t i = 0; i < payload_size; i += sizeof(uint32_t)) {
write32le((void *)0x40010000, i, read32le(payload, i));
}
reboot_to_payload();
}
__attribute__((noreturn)) void wait_for_button_and_reboot(void) {