kern: use different psr masks for 64 and 32-bit El0 threads
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@@ -40,8 +40,6 @@ namespace ams::kern::arch::arm64 {
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namespace {
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constexpr inline u32 El0PsrMask = 0xFF0FFE20;
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ALWAYS_INLINE bool IsFpuEnabled() {
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return cpu::ArchitecturalFeatureAccessControlRegisterAccessor().IsFpEnabled();
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}
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@@ -191,7 +189,7 @@ namespace ams::kern::arch::arm64 {
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out->lr = e_ctx->x[30];
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out->sp = e_ctx->sp;
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out->pc = e_ctx->pc;
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out->pstate = e_ctx->psr & El0PsrMask;
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out->pstate = e_ctx->psr & cpu::El0Aarch64PsrMask;
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/* Get the thread's general purpose registers. */
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if (thread->IsCallingSvc()) {
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@@ -227,7 +225,7 @@ namespace ams::kern::arch::arm64 {
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} else {
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/* Set special registers. */
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out->pc = static_cast<u32>(e_ctx->pc);
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out->pstate = e_ctx->psr & El0PsrMask;
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out->pstate = e_ctx->psr & cpu::El0Aarch32PsrMask;
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/* Get the thread's general purpose registers. */
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for (size_t i = 0; i < 15; ++i) {
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