thermosphere: use barriers and caches *properly*. Cache code refactoring

- set/way cache ops create losses of coherency, do not broadcast and are only meant to be used on boot, period.

Cache ops by VA are **the only way** to do data cache maintenance.

Fix a bug where the L2 cache was evicted by each core. It shouldn't have.

- Cleaning dcache to PoU and invalidating icache to PoU, by VA is sufficient for self-modifying code

- Since we operate within a single cluster and don't do DMA, we almost always operate within the inner shareability domain

(commit untested on real hw)

thermosphere/src/smc.c

@@ -1,7 +1,7 @@
 #include <string.h>
 #include "smc.h"
 #include "core_ctx.h"
-#include "arm.h"
+#include "caches.h"
 
 // Currently in exception_vectors.s:
 extern const u32 doSmcIndirectCallImpl[];
@@ -16,8 +16,7 @@ void doSmcIndirectCall(ExceptionStackFrame *frame, u32 smcId)
     memcpy(codebuf, doSmcIndirectCallImpl, doSmcIndirectCallImplSize);
     codebuf[doSmcIndirectCallImplSmcInstructionOffset / 4] |= smcId << 5;
 
-    flush_dcache_range(codebuf, codebuf + doSmcIndirectCallImplSize/4);
-    invalidate_icache_all();
+    cacheHandleSelfModifyingCodePoU(codebuf, doSmcIndirectCallImplSize/4);
 
     ((void (*)(ExceptionStackFrame *))codebuf)(frame);
 }