thermosphere: refactor tegra uart code, etc.
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@@ -21,21 +21,21 @@
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// For both guest and host
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#define MAX_NUM_REGISTERED_INTERRUPTS 512
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#define GIC_IRQID_PMU 23
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#define GIC_IRQID_MAINTENANCE 25
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#define GIC_IRQID_NS_PHYS_HYP_TIMER 26
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#define GIC_IRQID_NS_VIRT_TIMER 27
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//#define GIC_IRQID_LEGACY_NFIQ 28 not defined?
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#define GIC_IRQID_SEC_PHYS_TIMER 29
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#define GIC_IRQID_NS_PHYS_TIMER 30
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//#define GIC_IRQID_LEGACY_NIRQ 31 not defined?
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#define GIC_IRQID_PMU 23
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#define GIC_IRQID_MAINTENANCE 25
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#define GIC_IRQID_NS_PHYS_HYP_TIMER 26
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#define GIC_IRQID_NS_VIRT_TIMER 27
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//#define GIC_IRQID_LEGACY_NFIQ 28 not defined?
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#define GIC_IRQID_SEC_PHYS_TIMER 29
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#define GIC_IRQID_NS_PHYS_TIMER 30
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//#define GIC_IRQID_LEGACY_NIRQ 31 not defined?
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#define GIC_IRQID_NS_VIRT_HYP_TIMER GIC_IRQID_SPURIOUS // SBSA: 28. Unimplemented
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#define GIC_IRQID_SEC_PHYS_HYP_TIMER GIC_IRQID_SPURIOUS // SBSA: 20. Unimplemented
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#define GIC_IRQID_SEC_VIRT_HYP_TIMER GIC_IRQID_SPURIOUS // SBSA: 19. Unimplemented
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#define GIC_IRQID_UART 33
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#define GIC_IRQID_UART (32 + 1)
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static inline void initGicV2Pointers(ArmGicV2 *gic)
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{
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@@ -83,12 +83,11 @@ void uartInit(UartDevice dev, u32 baudRate, u32 flags)
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uart->icr = PL011_ALL_INTERRUPTS;
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// Register the interrupt ID
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//configureInterrupt(uartGetIrqId(dev), IRQ_PRIORITY_HOST, true);
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configureInterrupt(uartGetIrqId(dev), IRQ_PRIORITY_HOST, true);
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// Enable tx, rx, and uart overall
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uart->cr = PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN;
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uart->imsc = PL011_RTI | PL011_RXI | PL011_RXI;
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//uart->imsc = PL011_RTI | PL011_RXI | PL011_RXI;
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}
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void uartWriteData(UartDevice dev, const void *buffer, size_t size)
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@@ -120,24 +119,48 @@ size_t uartReadDataMax(UartDevice dev, void *buffer, size_t maxSize)
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volatile PL011UartRegisters *uart = uartGetRegisters(dev);
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u8 *buf8 = (u8 *)buffer;
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size_t i;
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size_t count = 0;
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for (i = 0; i < maxSize && !(uart->fr & PL011_UARTFR_RXFE); i++) {
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for (size_t i = 0; i < maxSize && !(uart->fr & PL011_UARTFR_RXFE); i++) {
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buf8[i] = uart->dr;
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++count;
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}
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return 1 + i;
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return count;
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}
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void uartSetInterruptStatus(UartDevice dev, bool read, bool enable)
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ReadWriteDirection uartGetInterruptDirection(UartDevice dev)
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{
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volatile PL011UartRegisters *uart = uartGetRegisters(dev);
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u32 ret = 0;
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u32 istatus = uart->mis;
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if (istatus & (PL011_RTI | PL011_RXI)) {
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ret |= DIRECTION_READ;
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}
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if (istatus & PL011_TXI) {
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ret |= DIRECTION_WRITE;
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}
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return (ReadWriteDirection)ret;
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}
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void uartSetInterruptStatus(UartDevice dev, ReadWriteDirection direction, bool enable)
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{
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volatile PL011UartRegisters *uart = uartGetRegisters(dev);
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u32 mask = read ? PL011_RTI | PL011_RXI : PL011_RTI;
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u32 mask = 0;
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if (direction & DIRECTION_READ) {
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mask |= PL011_RTI | PL011_RXI;
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}
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if (direction & DIRECTION_WRITE) {
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mask |= PL011_TXI;
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}
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if (enable) {
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uart->imsc |= mask;
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} else {
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uart->icr = mask;
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uart->imsc &= ~mask;
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}
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}
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}
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@@ -132,7 +132,8 @@ void uartInit(UartDevice dev, u32 baudRate, u32 flags);
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void uartWriteData(UartDevice dev, const void *buffer, size_t size);
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void uartReadData(UartDevice dev, void *buffer, size_t size);
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size_t uartReadDataMax(UartDevice dev, void *buffer, size_t maxSize);
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void uartSetInterruptStatus(UartDevice dev, bool read, bool enable);
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ReadWriteDirection uartGetInterruptDirection(UartDevice dev);
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void uartSetInterruptStatus(UartDevice dev, ReadWriteDirection direction, bool enable);
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static inline u16 uartGetIrqId(UartDevice dev)
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{
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@@ -142,4 +143,4 @@ static inline u16 uartGetIrqId(UartDevice dev)
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default:
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return GIC_IRQID_SPURIOUS;
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}
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}
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}
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