kern: mostly kill magic numbers in assembly, fix SVCs >= 0x80
This commit is contained in:
@@ -15,88 +15,88 @@
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*/
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#include <mesosphere/kern_select_assembly_offsets.h>
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#define SAVE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \
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/* Save the callee save registers + SP and cpacr. */ \
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mov tmp0, sp; \
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mrs tmp1, cpacr_el1; \
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stp x19, x20, [ctx, #(8 * 0)]; \
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stp x21, x22, [ctx, #(8 * 2)]; \
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stp x23, x24, [ctx, #(8 * 4)]; \
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stp x25, x26, [ctx, #(8 * 6)]; \
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stp x27, x28, [ctx, #(8 * 8)]; \
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stp x29, x30, [ctx, #(8 * 10)]; \
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\
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stp tmp0, tmp1, [ctx, #0x60]; \
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\
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/* Check whether the FPU is enabled. */ \
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/* If it isn't, skip saving FPU state. */ \
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and tmp1, tmp1, #0x300000; \
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cbz tmp1, done_label; \
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\
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/* Save fpcr and fpsr. */ \
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mrs tmp0, fpcr; \
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mrs tmp1, fpsr; \
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stp tmp0, tmp1, [ctx, #0x70]; \
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\
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/* Save the FPU registers. */ \
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stp q0, q1, [ctx, #(16 * 0 + 0x80)]; \
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stp q2, q3, [ctx, #(16 * 2 + 0x80)]; \
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stp q4, q5, [ctx, #(16 * 4 + 0x80)]; \
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stp q6, q7, [ctx, #(16 * 6 + 0x80)]; \
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stp q8, q9, [ctx, #(16 * 8 + 0x80)]; \
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stp q10, q11, [ctx, #(16 * 10 + 0x80)]; \
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stp q12, q13, [ctx, #(16 * 12 + 0x80)]; \
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stp q14, q15, [ctx, #(16 * 14 + 0x80)]; \
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stp q16, q17, [ctx, #(16 * 16 + 0x80)]; \
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stp q18, q19, [ctx, #(16 * 18 + 0x80)]; \
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stp q20, q21, [ctx, #(16 * 20 + 0x80)]; \
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stp q22, q23, [ctx, #(16 * 22 + 0x80)]; \
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stp q24, q25, [ctx, #(16 * 24 + 0x80)]; \
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stp q26, q27, [ctx, #(16 * 26 + 0x80)]; \
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stp q28, q29, [ctx, #(16 * 28 + 0x80)]; \
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stp q30, q31, [ctx, #(16 * 30 + 0x80)];
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#define SAVE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \
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/* Save the callee save registers + SP and cpacr. */ \
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mov tmp0, sp; \
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mrs tmp1, cpacr_el1; \
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stp x19, x20, [ctx, #(THREAD_CONTEXT_X19_X20)]; \
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stp x21, x22, [ctx, #(THREAD_CONTEXT_X21_X22)]; \
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stp x23, x24, [ctx, #(THREAD_CONTEXT_X23_X24)]; \
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stp x25, x26, [ctx, #(THREAD_CONTEXT_X25_X26)]; \
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stp x27, x28, [ctx, #(THREAD_CONTEXT_X27_X28)]; \
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stp x29, x30, [ctx, #(THREAD_CONTEXT_X29_X30)]; \
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\
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stp tmp0, tmp1, [ctx, #(THREAD_CONTEXT_SP_CPACR)]; \
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\
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/* Check whether the FPU is enabled. */ \
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/* If it isn't, skip saving FPU state. */ \
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and tmp1, tmp1, #0x300000; \
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cbz tmp1, done_label; \
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\
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/* Save fpcr and fpsr. */ \
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mrs tmp0, fpcr; \
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mrs tmp1, fpsr; \
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stp tmp0, tmp1, [ctx, #(THREAD_CONTEXT_FPCR_FPSR)]; \
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\
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/* Save the FPU registers. */ \
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stp q0, q1, [ctx, #(16 * 0 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q2, q3, [ctx, #(16 * 2 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q4, q5, [ctx, #(16 * 4 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q6, q7, [ctx, #(16 * 6 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q8, q9, [ctx, #(16 * 8 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q10, q11, [ctx, #(16 * 10 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q12, q13, [ctx, #(16 * 12 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q14, q15, [ctx, #(16 * 14 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q16, q17, [ctx, #(16 * 16 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q18, q19, [ctx, #(16 * 18 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q20, q21, [ctx, #(16 * 20 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q22, q23, [ctx, #(16 * 22 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q24, q25, [ctx, #(16 * 24 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q26, q27, [ctx, #(16 * 26 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q28, q29, [ctx, #(16 * 28 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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stp q30, q31, [ctx, #(16 * 30 + THREAD_CONTEXT_FPU_REGISTERS)];
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#define RESTORE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \
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/* Restore the callee save registers + SP and cpacr. */ \
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ldp tmp0, tmp1, [ctx, #0x60]; \
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mov sp, tmp0; \
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ldp x19, x20, [ctx, #(8 * 0)]; \
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ldp x21, x22, [ctx, #(8 * 2)]; \
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ldp x23, x24, [ctx, #(8 * 4)]; \
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ldp x25, x26, [ctx, #(8 * 6)]; \
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ldp x27, x28, [ctx, #(8 * 8)]; \
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ldp x29, x30, [ctx, #(8 * 10)]; \
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\
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msr cpacr_el1, tmp1; \
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isb; \
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\
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/* Check whether the FPU is enabled. */ \
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/* If it isn't, skip saving FPU state. */ \
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and tmp1, tmp1, #0x300000; \
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cbz tmp1, done_label; \
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\
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/* Save fpcr and fpsr. */ \
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ldp tmp0, tmp1, [ctx, #0x70]; \
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msr fpcr, tmp0; \
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msr fpsr, tmp1; \
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\
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/* Save the FPU registers. */ \
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ldp q0, q1, [ctx, #(16 * 0 + 0x80)]; \
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ldp q2, q3, [ctx, #(16 * 2 + 0x80)]; \
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ldp q4, q5, [ctx, #(16 * 4 + 0x80)]; \
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ldp q6, q7, [ctx, #(16 * 6 + 0x80)]; \
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ldp q8, q9, [ctx, #(16 * 8 + 0x80)]; \
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ldp q10, q11, [ctx, #(16 * 10 + 0x80)]; \
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ldp q12, q13, [ctx, #(16 * 12 + 0x80)]; \
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ldp q14, q15, [ctx, #(16 * 14 + 0x80)]; \
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ldp q16, q17, [ctx, #(16 * 16 + 0x80)]; \
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ldp q18, q19, [ctx, #(16 * 18 + 0x80)]; \
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ldp q20, q21, [ctx, #(16 * 20 + 0x80)]; \
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ldp q22, q23, [ctx, #(16 * 22 + 0x80)]; \
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ldp q24, q25, [ctx, #(16 * 24 + 0x80)]; \
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ldp q26, q27, [ctx, #(16 * 26 + 0x80)]; \
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ldp q28, q29, [ctx, #(16 * 28 + 0x80)]; \
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ldp q30, q31, [ctx, #(16 * 30 + 0x80)];
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#define RESTORE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \
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/* Restore the callee save registers + SP and cpacr. */ \
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ldp tmp0, tmp1, [ctx, #(THREAD_CONTEXT_SP_CPACR)]; \
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mov sp, tmp0; \
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ldp x19, x20, [ctx, #(THREAD_CONTEXT_X19_X20)]; \
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ldp x21, x22, [ctx, #(THREAD_CONTEXT_X21_X22)]; \
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ldp x23, x24, [ctx, #(THREAD_CONTEXT_X23_X24)]; \
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ldp x25, x26, [ctx, #(THREAD_CONTEXT_X25_X26)]; \
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ldp x27, x28, [ctx, #(THREAD_CONTEXT_X27_X28)]; \
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ldp x29, x30, [ctx, #(THREAD_CONTEXT_X29_X30)]; \
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\
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msr cpacr_el1, tmp1; \
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isb; \
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\
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/* Check whether the FPU is enabled. */ \
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/* If it isn't, skip saving FPU state. */ \
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and tmp1, tmp1, #0x300000; \
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cbz tmp1, done_label; \
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\
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/* Save fpcr and fpsr. */ \
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ldp tmp0, tmp1, [ctx, #(THREAD_CONTEXT_FPCR_FPSR)]; \
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msr fpcr, tmp0; \
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msr fpsr, tmp1; \
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\
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/* Save the FPU registers. */ \
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ldp q0, q1, [ctx, #(16 * 0 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q2, q3, [ctx, #(16 * 2 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q4, q5, [ctx, #(16 * 4 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q6, q7, [ctx, #(16 * 6 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q8, q9, [ctx, #(16 * 8 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q10, q11, [ctx, #(16 * 10 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q12, q13, [ctx, #(16 * 12 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q14, q15, [ctx, #(16 * 14 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q16, q17, [ctx, #(16 * 16 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q18, q19, [ctx, #(16 * 18 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q20, q21, [ctx, #(16 * 20 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q22, q23, [ctx, #(16 * 22 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q24, q25, [ctx, #(16 * 24 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q26, q27, [ctx, #(16 * 26 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q28, q29, [ctx, #(16 * 28 + THREAD_CONTEXT_FPU_REGISTERS)]; \
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ldp q30, q31, [ctx, #(16 * 30 + THREAD_CONTEXT_FPU_REGISTERS)];
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/* ams::kern::KScheduler::ScheduleImpl() */
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@@ -109,11 +109,11 @@
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_ZN3ams4kern10KScheduler12ScheduleImplEv:
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/* Right now, x0 contains (this). We want x1 to point to the scheduling state, */
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/* Current KScheduler layout has state at +0x0. */
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/* KScheduler layout has state at +0x0, this is guaranteed statically by assembly offsets. */
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mov x1, x0
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/* First thing we want to do is check whether the interrupt task thread is runnable. */
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ldrb w3, [x1, #1]
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ldrb w3, [x1, #(KSCHEDULER_INTERRUPT_TASK_THREAD_RUNNABLE)]
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cbz w3, 0f
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/* If it is, we want to call KScheduler::InterruptTaskThreadToRunnable() to change its state to runnable. */
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@@ -124,7 +124,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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ldp x0, x1, [sp], 16
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/* Clear the interrupt task thread as runnable. */
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strb wzr, [x1, #1]
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strb wzr, [x1, #(KSCHEDULER_INTERRUPT_TASK_THREAD_RUNNABLE)]
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0: /* Interrupt task thread runnable checked. */
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/* Now we want to check if there's any scheduling to do. */
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@@ -135,7 +135,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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dmb ish
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/* Check if the highest priority thread is the same as the current thread. */
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ldr x7, [x1, 16]
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ldr x7, [x1, #(KSCHEDULER_HIGHEST_PRIORITY_THREAD)]
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ldr x2, [x18]
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cmp x7, x2
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b.ne 1f
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@@ -158,7 +158,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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2: /* We're done saving this thread's context, so we need to unlock it. */
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/* We can just do an atomic write to the relevant KThreadContext member. */
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add x2, x2, #0x280
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add x2, x2, #(THREAD_CONTEXT_LOCKED)
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stlrb wzr, [x2]
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3: /* The current thread's context has been entirely taken care of. */
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@@ -169,7 +169,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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mov x21, x7 /* highest priority thread */
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/* Set our stack to the idle thread stack. */
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ldr x3, [x20, #0x18]
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ldr x3, [x20, #(KSCHEDULER_IDLE_THREAD_STACK)]
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mov sp, x3
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b 5f
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@@ -183,7 +183,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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dmb ish
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/* Refresh the highest priority thread. */
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ldr x21, [x20, 16]
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ldr x21, [x20, #(KSCHEDULER_HIGHEST_PRIORITY_THREAD)]
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5: /* We're starting to try to do the context switch. */
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/* Check if the highest priority thread if null. */
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@@ -197,7 +197,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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mov x22, x0
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/* Prepare to try to acquire the context lock. */
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add x1, x22, #0x280
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add x1, x22, #(THREAD_CONTEXT_LOCKED)
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mov w2, #1
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6: /* We want to try to lock the highest priority thread's context. */
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@@ -214,7 +214,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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7: /* The highest priority thread's context is already locked. */
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/* Check if we need scheduling. If we don't, we can retry directly. */
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ldarb w3, [x20]
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ldarb w3, [x20] // ldarb w3, [x20, #(KSCHEDULER_NEEDS_SCHEDULING)]
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cbz w3, 6b
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/* If we do, another core is interfering, and we must start from the top. */
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@@ -229,7 +229,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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bl _ZN3ams4kern10KScheduler12SwitchThreadEPNS0_7KThreadE
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/* Check if we need scheduling. If we don't, then we can't complete the switch and should retry. */
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ldarb w1, [x20]
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ldarb w1, [x20] // ldarb w1, [x20, #(KSCHEDULER_NEEDS_SCHEDULING)]
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cbnz w1, 10f
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/* Restore the thread context. */
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@@ -241,7 +241,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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10: /* Our switch failed. */
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/* We should unlock the thread context, and then retry. */
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add x1, x22, #0x280
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add x1, x22, #(THREAD_CONTEXT_LOCKED)
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stlrb wzr, [x1]
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b 4b
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@@ -255,7 +255,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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12: /* We've switched to the idle thread, so we want to loop until we schedule a non-idle thread. */
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/* Check if we need scheduling. */
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ldarb w3, [x20]
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ldarb w3, [x20] // ldarb w3, [x20, #(KSCHEDULER_NEEDS_SCHEDULING)]
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cbnz w3, 13f
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/* If we don't, wait for an interrupt and check again. */
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@@ -268,14 +268,14 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
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13: /* We need scheduling again! */
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/* Check whether the interrupt task thread needs to be set runnable. */
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ldrb w3, [x20, #1]
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ldrb w3, [x20, #(KSCHEDULER_INTERRUPT_TASK_THREAD_RUNNABLE)]
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cbz w3, 4b
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/* It does, so do so. We're using the idle thread stack so no register state preserve needed. */
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bl _ZN3ams4kern10KScheduler29InterruptTaskThreadToRunnableEv
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/* Clear the interrupt task thread as runnable. */
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strb wzr, [x20, #1]
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strb wzr, [x20, #(KSCHEDULER_INTERRUPT_TASK_THREAD_RUNNABLE)]
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/* Retry the scheduling loop. */
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b 4b
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