From 6703eb990c62ade7ab54e8e4f088e473a2be668b Mon Sep 17 00:00:00 2001 From: NaGa Date: Tue, 14 Apr 2026 04:12:32 +0200 Subject: [PATCH] . --- .../program/source/smc/secmon_pmc_access_table_data.inc | 7 +++++++ libraries/libvapours/include/vapours/tegra/tegra_pmc.hpp | 6 ++++++ 2 files changed, 13 insertions(+) diff --git a/exosphere/program/source/smc/secmon_pmc_access_table_data.inc b/exosphere/program/source/smc/secmon_pmc_access_table_data.inc index 73471d6f6..a6f04e744 100644 --- a/exosphere/program/source/smc/secmon_pmc_access_table_data.inc +++ b/exosphere/program/source/smc/secmon_pmc_access_table_data.inc @@ -44,4 +44,11 @@ SetRegisterAllowed(APBDEV_PMC_SEL_DPD_TIM); /* 0x1C8 */ SetRegisterAllowed(APBDEV_PMC_TSC_MULT); /* 0x2B4 */ SetRegisterAllowed(APBDEV_PMC_GPU_RG_CNTRL); /* 0x2D4 */ SetRegisterAllowed(APBDEV_PMC_CNTRL2); /* 0x440 */ +SetRegisterAllowed(APBDEV_PMC_AOTAG_CFG); /* 0x484 */ +SetRegisterAllowed(APBDEV_PMC_TSENSOR_CONFIG0); /* 0x49C */ +SetRegisterAllowed(APBDEV_PMC_TSENSOR_CONFIG1); /* 0x4A0 */ +SetRegisterAllowed(APBDEV_PMC_TSENSOR_CONFIG2); /* 0x4A4 */ +SetRegisterAllowed(APBDEV_PMC_TSENSOR_STATUS0); /* 0x4A8 */ +SetRegisterAllowed(APBDEV_PMC_TSENSOR_STATUS1); /* 0x4AC */ +SetRegisterAllowed(APBDEV_PMC_TSENSOR_PDIV); /* 0x4B4 */ SetRegisterAllowed(APBDEV_PMC_WAKE_DEBOUNCE_EN); /* 0x4D8 */ \ No newline at end of file diff --git a/libraries/libvapours/include/vapours/tegra/tegra_pmc.hpp b/libraries/libvapours/include/vapours/tegra/tegra_pmc.hpp index 34536bf50..530abe502 100644 --- a/libraries/libvapours/include/vapours/tegra/tegra_pmc.hpp +++ b/libraries/libvapours/include/vapours/tegra/tegra_pmc.hpp @@ -60,6 +60,12 @@ #define APBDEV_PMC_WEAK_BIAS (0x2C8) #define APBDEV_PMC_REG_SHORT (0x2CC) #define APBDEV_PMC_GPU_RG_CNTRL (0x2D4) +#define APBDEV_PMC_TSENSOR_CONFIG0 (0x49C) +#define APBDEV_PMC_TSENSOR_CONFIG1 (0x4A0) +#define APBDEV_PMC_TSENSOR_CONFIG2 (0x4A4) +#define APBDEV_PMC_TSENSOR_STATUS0 (0x4A8) +#define APBDEV_PMC_TSENSOR_STATUS1 (0x4AC) +#define APBDEV_PMC_TSENSOR_PDIV (0x4B4) #define APBDEV_PMC_CNTRL2 (0x440) #define APBDEV_PMC_FUSE_CTRL (0x450) #define APBDEV_PMC_IO_DPD3_REQ (0x45C)