OmniNX/AllgemeinerProblemLoeser
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uplift libbdk

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Signed-off-by: Damien Zhao <zdm65477730@126.com>
This commit is contained in:
Damien Zhao
2025-11-21 22:20:38 +08:00
parent 3454c13e4a
commit ec6518ccbf
73 changed files with 5114 additions and 1659 deletions
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26
bdk/soc/t210.h
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@@ -38,6 +38,7 @@
#define SOR1_BASE 0x54580000
#define GPU_BASE 0x57000000
#define GPU_USER_BASE 0x58000000
#define PG_BASE 0x60000000
#define RES_SEMAPH_BASE 0x60001000
#define ARB_SEMAPH_BASE 0x60002000
#define ARB_PRI_BASE 0x60003000
@@ -68,6 +69,8 @@
#define ATOMICS_BASE 0x70016000
#define MC_BASE 0x70019000
#define EMC_BASE 0x7001B000
#define MC0_BASE 0x7001C000
#define MC1_BASE 0x7001D000
#define EMC0_BASE 0x7001E000
#define EMC1_BASE 0x7001F000
#define XUSB_HOST_BASE 0x70090000
@@ -114,6 +117,7 @@
#define SOR1(off) MMIO_REG32(SOR1_BASE, off)
#define GPU(off) MMIO_REG32(GPU_BASE, off)
#define GPU_USER(off) MMIO_REG32(GPU_USER_BASE, off)
#define PG(off) MMIO_REG32(PG_BASE, off)
#define ARB_PRI(off) MMIO_REG32(ARB_PRI_BASE, off)
#define ICTLR(cidx, off) MMIO_REG32(ICTLR_BASE + (0x100 * (cidx)), off)
#define TMR(off) MMIO_REG32(TMR_BASE, off)
@@ -140,6 +144,8 @@
#define SE(off) MMIO_REG32(SE_BASE, off)
#define MC(off) MMIO_REG32(MC_BASE, off)
#define EMC(off) MMIO_REG32(EMC_BASE, off)
#define MC_CH0(off) MMIO_REG32(MC0_BASE, off)
#define MC_CH1(off) MMIO_REG32(MC1_BASE, off)
#define EMC_CH0(off) MMIO_REG32(EMC0_BASE, off)
#define EMC_CH1(off) MMIO_REG32(EMC1_BASE, off)
#define XUSB_HOST(off) MMIO_REG32(XUSB_HOST_BASE, off)
@@ -297,8 +303,10 @@
#define IPATCH_CAM_ENTRIES 12
/*! I2S registers. */
#define I2S1_CG 0x88
#define I2S1_CTRL 0xA0
#define I2S_CG 0x88
#define I2S_CTRL 0xA0
#define I2S1_CG I2S_CG
#define I2S1_CTRL I2S_CTRL
#define I2S2_CG 0x188
#define I2S2_CTRL 0x1A0
#define I2S3_CG 0x288
@@ -307,8 +315,9 @@
#define I2S4_CTRL 0x3A0
#define I2S5_CG 0x488
#define I2S5_CTRL 0x4A0
#define I2S_CG_SLCG_ENABLE BIT(0)
#define I2S_CTRL_MASTER_EN BIT(10)
#define I2S_CG_SLCG_DISABLE 0
#define I2S_CG_SLCG_ENABLE BIT(0)
#define I2S_CTRL_MASTER_EN BIT(10)
/*! PWM registers. */
#define PWM_CONTROLLER_PWM_CSR_0 0x00
@@ -318,7 +327,6 @@
/*! Special registers. */
#define EMC_SCRATCH0 0x324
#define EMC_HEKA_UPD BIT(30)
#define EMC_SEPT_RUN BIT(31)
/*! Flow controller registers. */
#define FLOW_CTLR_HALT_COP_EVENTS 0x4
@@ -377,4 +385,12 @@
#define NVDEC_SA_KEYSLOT_OTF 0x210C
#define NVDEC_SA_KEYSLOT_GLOBAL_RW 0x2118
#define NVDEC_VPR_ALL_OTF_GOTO_VPR 0x211C
/* PG registers */
#define PG_UP_TAG 0x0 // Changes depending on what does the reg read request.
#define TAG_PID_CCPLEX 0x55555555
#define TAG_PID_BPMP 0xAAAAAAAA
#define TAG_PID_COP2 0x99999999
#define TAG_PID_OTHER 0xCCCCCCCC
#endif